Entwicklung einer leistungsstarken RISC-V-Architektur als Hochtemperatur-ASIC für Tiefbohrsysteme

The growing importance of geothermal energy as part of the energy transition requires more precise and economically efficient deep-drilling technologies. Modern drilling systems must operate at depths of several kilometers, where temperatures exceed 200 °C, pressures are extremely high, and strong vibrations occur. Since data transmission to the surface is only possible to a limited extent, signal processing and control algorithms must be executed directly on site. Existing high-temperature electronics reach their limits under such conditions: commercial solutions are either computationally low-performance, expensive, or difficult to adapt. Modern semiconductor technologies with feature sizes below 10 nm are unsuitable for high-temperature operation, as their reliability rapidly degrades above approximately 100 °C. Therefore, specialized fabrication technologies such as X-FAB XT018 are used, whose integration density lags roughly three decades behind modern processes. This requires an architectural design that compensates for technological limitations at the system and microarchitectural level while fully exploiting the robustness of high-temperature technology. Within this work, the HOT-RISC-V processor was developed, specifically designed for operation in high-temperature environments. It is based on the open RISC-V instruction set architecture and combines modularity, energy efficiency, and robustness. A dedicated design space exploration methodology systematically varies and evaluates architectural parameters to identify the optimal trade-off between computational performance, power consumption, and thermal stability. The HOT-RISC-V was implemented as an IC in the XT018 180 nm SOI technology. Measurements show stable operation up to 200 °C and clock frequencies of up to 220 MHz — more than twice that of previous high-temperature processors. With a performance of 1.36 CoreMark/MHz at 175 °C, the processor achieves an unprecedented combination of computational efficiency and thermal robustness. The results demonstrate that targeted architectural optimization can largely compensate for the disadvantages of older high-temperature technologies. Thus, the HOT-RISC-V opens new possibilities for local data processing in deep-drilling, geothermal, and high-temperature electronics and provides a scalable foundation for future high-temperature SoCs.